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february 17, 2005 1 m9999-021705 micrf007 micrel micrel, inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel + 1 (408) 944-0800 ? fax + 1 (408) 474-1000 ? http://www.micrel.com micrf007 qwikradio ? low-power uhf receiver typical application 315mhz 1200b/s on-off keyed receiver features ? complete uhf receiver on a monolithic chip ? 300mhz to 440mhz ? data rates up to 3.2kbps nrz ? automatic tuning, no manual adjustment ? low power consumption C 315mhz: 2.3 ma fully operational 0.5a shutdown 230a polled at a 10:1 duty cycle ratio C 433.92mhz: 3.8ma fully operational 0.5a shutdown 380a polled at a 10:1 duty cycle ratio ? virtually no rf re-radiation at the antenna ? cmos logic interface to standard decoder and micro - processor ics ? extremely low external part count ? no ?lters or inductors required applications ? automotive remote keyless entry (rke) ? long range rf identi?cation ? remote fan and light control ? garage door and gate openers qwikradio is a trademark of micrel, inc. the qwikradio ics were developed under a partnership agreement with ait of orlando, florida. general description the micrf007 is a single chip, on-off keyed (ask/ook) receiver for remote wireless applications, employing micrels latest qwikradio ? technology. this device is a true antenna-in to data-out monolithic device. all rf and if tuning is accom - plished automatically within the ic, which eliminates manual tuning, and reduces production costs. the result is a highly reliable yet extremely low cost solution. the micrf007 is an enhanced version of the micrf002 and micrf011. the micrf007 is a conventional superhetrodyne receiver, with an (internal) local oscillator ?xed at a single frequency based on an external reference crystal or clock. as with any conventional superhetrodyne receiver, the companion trans - mitters frequency must be accurately controlled, generally with a crystal or saw (surface acoustic wave) resonator. the micrf007 provides two enhancements over the mi - crf001/011: (1) a shutdown mode, which may be used for duty-cycle operation, and (2) reduced current consumption. the micrf007 requires a mere 2.3ma at 315mhz (3.8ma at 433.92mhz) when fully operational. these features make the micrf007 ideal for low and ultra-low power applications, such as rke and rfid. all post-detection (demodulator) data ?ltering is provided on the micrf007, so no external baseband ?lters are required. the demodulator ?lter bandwidth is ?xed at 2.5khz. data rates up to 3.2kbps nrz may be used. all support documentation can be found on micrels web site at www.micrel.com. qwikradio ? vss refosc ant cagc vdd shut cth do 0.039f 4.8970mhz data output micrf007 2.2f +5v 50 ?ant 1.8pf 56nh
micrf007 micrel m9999-021705 2 february 17, 2005 pin con?guration MICRF007BM 1 vss ant vdd cth 8 refosc cagc shut do 7 6 5 2 3 4 8-pin soic (m) pin description pin number pin name pin function 1 vss ground: signal and power ground. 2 ant antenna (analog input): high-impedance, internally ac-coupled receiver input. for optimal performance, the ant pin should be impedance matched to the antenna. 3 vdd power supply (input): positive supply input. connect a low esl, low esr de-coupling capacitor from this pin to vss. lead lengths should be as short as possible. 4 cth data slicing threshold capacitor (analog i/o): capacitor connected to this pin extracts the dc average value from the demodulated waveform which becomes the reference for the internal data slicing comparator. 5 do data output (digital output): cmos-level compatible data output signal. 6 shut shutdown (digital input): shutdown-mode logic-level control input. pull low to enable the receiver. internally pulled-up to vdd. 7 cagc automatic gain control (analog i/o): connect an external capacitor to set the attack/decay ratio of the on-chip automatic gain control. 8 refosc reference oscillator: timing reference, sets the rf receive frequency. ordering information part number standard pb-free junction temp. range package MICRF007BM micrf007ym C40c to +85c 8-pin soic
february 17, 2005 3 m9999-021705 micrf007 micrel electrical characteristics (4) power supply: +4.75v v dd 5.5v, v ss = 0v; c agc = 4.7f, c th = 0.047f; f t = 6.7458mhz (equivalent of f rf = 433.92mhz); data- rate = 600bps (manchester encoded). t a = 25c, bold values indicate C40c t a +85c; current ?ow into device pins is positive; unless noted. symbol parameter condition min typ max units i op operating current at 315.0mhz continuous operation 2.3 3.5 ma polled with 10:1 duty cycle 230 a operating current at 433.92mhz continuous operation 3.8 5.7 ma polled with 10:1 duty cycle 470 a i stby standby current v shut = v dd 0.9 2 a rf section, if section receiver sensitivity f rf = 433.92mhz, 1.2kbps C99 dbm f if if center frequency note 7 1.18 mhz f bw if bandwidth notes 6, 7 0.4 0.70 mhz maximum receiver input ref. impedance = 50 C20 dbm spurious reverse isolation ant pin, ref. impedance = 50 (8) 30 vrms agc attack to decay ratio t attack t decay 10 agc leakage current t a = +85c 50 na reference oscillator (9) reference oscillator to 1% of ?nal value 2.5 ms stabilization time z refosc reference oscillator input impedance 290 k reference oscillator source current 5.2 a demodulator z cth c th source impedance note 10 110 k z cth c th source impedance variation C15 +15 % i zcth(leak) c th leakage current t a = +85c 50 na demodulator filter bandwidth note 7 2.5 khz digital/control section i in(pu) input pull-up current v shut = v ss 8 a v ih input high voltage v shut = v ss 0.8v dd v v il input low voltage v shut = v ss 0.2v dd v absolute maximum ratings (1) supply voltage (v dd ) ..................................................... +7v input/output voltage (v i/o ) ................... v ss C0.3 to v dd +0.3 junction temperature (t j ) ....................................... +150c storage temperature range (t s ) ............. C65c to +150c lead temperature (soldering, 10 sec.) .................... +260c esd rating (3) operating ratings (2) supply voltage (v dd ) ................................. +4.75v to +5.5v rf frequency range ........................... 300mhz to 440mhz data duty-cycle ............................................... 20% to 80% reference oscillator input range .............. 0.1v pp to 1.5v pp ambient temperature (t a ) .......................... C40c to +85c package thermal resistance 8-pin soic ( ja ) ................................................ 120c/w
micrf007 micrel m9999-021705 4 february 17, 2005 symbol parameter condition min typ max units i oh output high current 20.8 a i ol output low current 17.6 a v oh output high voltage do, i out = C1a 0.9v dd v v ol output low voltage do, i out = +1a 0.1v dd v t r , t f output rise and fall times do, c load = 15pf 10 s notes: 1. exceeding the absolute maximum rating may damage the device. 2. the device is not guaranteed to function outside its operating rating. 3. devices are e? mil-std-883c, method 3015. do not operate or store near strong electrostatic ? elds. 4. speci?cation for packaged product only. 5. sensitivity is de?ned as the average signal level, measured at the input, necessary to achieve 10 -2 ber (bit error rate). the input signal is de?ned as a return-to-zero (rz) waveform with 50% average duty cycle (manchester encoded data) at a data rate of 600bps. the rf input is assumed to be matched into 50. 6. sensitivity, a commonly speci?ed receiver parameter, provides an indication of the receivers input referred noise, generally input thermal noise. however, it is possibl noise is appreciab a better indicator of achievable receiver range performance is usually given by its selectivity, often stated as intermediate frequency (if) or radio frequency (rf) bandwidth, depending on receiver topology. selectivity is a measure of the rejection by the receiver of ambient noise. more selective receivers will almost invae - ally thermal will the receiver demonstrate sensitivity-limited performance. 7. parameter scales linearly with reference oscillator frequency f t . for any reference oscillator frequency other than 6.7458mhz, compute the param - eter value as the ratio: f t mhz 6.7458 (parameter value at 6.7458mhz) example: for reference oscillator freqency f t = 6.00mhz: (parameter value at 6.00mhz)= 6.00 6.7458 (parameter value at 6.7458mhz) 8. spurious reve? - ing network. 9. series resistance resistance is too great, the oscillator may oscillate at a diminished peak-to-peak level, or may fail to oscillate entirely . micrel recommends that series resistances for ceramic resonators and crystals not exceed 50 and 100 respectively . refer to application hint 35 for crystal recommendations. 10. parameter scales inversely with reference oscillator frequency f t . for any reference oscillator frequency other than 6.7458mhz, compute the parameter value as the ratio: 6.7458 f t mhz (parameter value at 6.7458mhz) example: for reference oscillator frequency f t = 6.00mhz: (parameter value at 6.00mhz) = 6.7458 6.00 (parameter value at 6.7458mhz)
february 17, 2005 5 m9999-021705 micrf007 micrel typical characteristics 1.5 3.0 4.5 6.0 300 325 350 375 400 425 450 frequency (mhz) supply current vs. frequency t a = 25c v dd = 5v continuous operation 1.5 2.0 2.5 3.0 3.5 -40 -20 0 20 40 60 80 100 temperature (c) supply current vs. temperature f = 315mhz v dd = 5v continuous operation
micrf007 micrel m9999-021705 6 february 17, 2005 applications information and functional description refer to the functional diagram. three sections of the ic are identi?ed: uhf down-converter, ook demodulator and ref- erence and control. also shown are two capacitors (cth, cagc) and one timing component (y1), usually a crystal. with the exception of a supply decoupling capacitor, these are the only external components needed by the micrf007 to assemble a complete uhf receiver. for optimal performance, micrf007 input impedance must be matched to the antenna impedance. the matching network will add an additional two or three components. there is one control input, shut pin. the shut function is used to enable the receiver. this input is cmos compatible, and is pulled-up on the ic. roll-off response of the if band-pass filter is 5th order, while the demodulator data ?lter exhibits a 2nd order response. the micrf007 is a standard super-heterodyne receiver with a narrow if ?lter bandwidth of 700khz. it is less susceptible to interfering rf signals. the micrf007 rf center frequency is controlled by an integrated pll/vco frequency synthesizer, which is locked to the reference oscillator frequency, typically set by a crystal. a tight tolerance transmitter such as saw or crystal-based transmitters must be used for the system. the micrf007 has a fully integrated base-band demodulator ?lter. the ?lter has a ?xed 2.5khz bandwidth and exhibits a 2nd order response. this ?lter limits the receiver raw data rate to 3.2kbps nrz. functional diagram peak detector agc control 2nd order programmable low-pass filter 5th order band-pass filter synthesizer control logic r sc reference oscillator cystal or ceramic resonator cagc ant vdd vss refosc 430khz switched- capacitor resistor cth do micrf007 rf amp if amp if amp compa- rator reference and control uhf downconverter ook demodulator f rx f lo f if shut c agc c th f t micrf007 block diagram design steps the following steps are the basic design steps for using the micrf007 receiver: 1. select the reference oscillator 2. select the c th capacitor 3. select the c agc capacitor step 1: selecting reference oscillator all timing and tuning operations on the micrf007 are de - rived from the internal colpitts reference oscillator. timing and tuning is controlled through the refosc pin in one of two ways: 1. connect a crystal. 2. drive this pin with an external timing signal. the speci?c reference frequency required is related to the system transmit frequency. crystal selection care should be taken to ensure low esr crystals are se - lected. application hint 35 provides additional information and recommended sources for crystals. when a crystal is used, the minimum voltage is 300mv pp . if using an externally applied signal, it should be ac-coupled and limited to the operating range of 0.1v pp to 1.5v pp . selecting reference oscillator frequency f t as with any super-heterodyne receiver, the difference between the internal local oscillator (lo) frequency f lo and the incoming transmit frequency f tx should equal the if center frequency. equation 1 may be used to compute the
february 17, 2005 7 m9999-021705 micrf007 micrel appropriate f lo for a given f tx : 433.92 ? ? ? ? ? ? f lo = f tx f tx 1.18 (1) frequencies f tx and f lo are in mhz. note that two values of f lo exist for any given f tx , distinguished as high-side mixing and low-side mixing. high-side mixing results in an image frequency above the frequency of interest and low- side mixing results in a frequency below. there is generally no preference of one over the other. after choosing one of the two acceptable values of f lo , use equation 2 to compute the reference oscillator frequency f t : f t = f lo 64.5 (2) frequency f t is in mhz. connect a crystal of frequency f t to refosc on the micrf007. four-decimal-place accuracy on the frequency is generally adequate. the following table identi?es f t for some common transmit frequencies. transmit reference frequency f tx oscillator frequency f t 315mhz 4.8970mhz 390mhz 6.0630mhz 418mhz 6.4983mhz 433.92mhz 6.7458mhz table 2. recommended reference oscillator values for typical transmit frequencies (high-side mixing) step 2: selecting c th capacitor extraction of the dc value of the demodulated signal for purposes of logic-level data slicing is accomplished using the external threshold capacitor c th and the on-chip switched capacitor resistor rsc, shown in the block diagram. slicing level time constant values vary somewhat with de- coder type, data pattern, and data rate, but typically values range from 5ms to 50ms.this issue is covered in more detail in application note 22. optimization of the value of c th is required to maximize range. q of 5x the bit-rate is recommended. the effective resistance of rsc is listed in the electrical characteristics table as 110k at 433.92mhz, this value scales inversely with frequency. source impedance of the c th pin at other frequencies is given by equation (3), where f t is in mhz: rsc = 110k 6.7458 f t (3) since slicing level time constant q has been established as 5 times bit rate, capacitor c th may be computed using equation (4), c th = r sc ? (4) a standard 20% x7r ceramic capacitor is generally suf?- cient. refer to application hint 42 for c th and c agc selec - tion examples. step 3: selecting c agc capacitor the signal path has automatic gain control (agc) to increase input dynamic range. the attack time constant of the agc is set externally by the value of the c agc capacitor connected to the c agc pin of the device. to maximize system range, it is important to keep the agc control voltage ripple low, preferably under 10mv pp once the control voltage has at - tained its quiescent value. for this reason, capacitor values of at least 0.47f are recommended. the agc control voltage is carefully managed on-chip to al - low duty-cycle operation of the micrf007. when the device is placed into shutdown mode (shut pin is pulled high), the agc capacitor ?oats to retain the voltage. when operation is resumed, only the voltage droop due to capacitor leakage must be replenished. a relatively low-leakage capacitor is recommended when the devices are used in duty-cycled operation. to further enhance duty-cycled operation, the agc push and pull currents are boosted for approximately 10ms im - mediately after the device is taken out of shutdown. this compensates for agc capacitor voltage droop and reduces the time to restore the correct agc voltage. the current is boosted by a factor of 45. selecting c agc capacitor in continuous mode a c agc capacitor in the range of 0.47f to 4.7f is typically recommended. caution! if the capacitor is too large, the agc may react too slowly to incoming signals. agc set - tling time from a completely discharged (zero-volt) state is given approximately by this equation: a t = 1.333 c agc C0.44 (5) where: c agc is in f, and a t is in seconds. selecting c agc capacitor in duty-cycle mode voltage droop across the c agc capacitor during shutdown should be replenished as quickly as possible after the ic is enabled. as mentioned above, the micrf007 boosts the push-pull current by a factor of 45 immediately after start-up. this ?xed time period is based on the reference oscillator frequency f t . the time is 10.9ms for f t = 6.00mhz, and varies inversely with f t . the value of c agc capacitor and the duration of the shutdown time period should be selected such that the droop can be replenished within this 10ms period. polarity of the droop is unknown, meaning the agc voltage could droop up or down. the worst-case from a recovery standpoint is downward droop, since the agc pull-up current is 1/10th magnitude of the pull-down current. the downward droop is replenished according to the equation 6: c agc = i ? t ? v (6) where: i = agc pull-up current for the initial 10ms (67.5a) cagc = agc capacitor value a t = droop recovery time
micrf007 micrel m9999-021705 8 february 17, 2005 ? v = droop voltage for example, if user desires ? t = 10ms and chooses a 4.7f c agc , then the allowable droop is about 144mv. using the same equation with 200na, the worst case pin leakage, and assuming 1a of capacitor leakage in the same direction, the maximum allowable ? t (shutdown time) is about 0.56s for droop recovery in 10ms. the ratio of decay-to-attack time-constant is ?xed at 1:10 (that is, the attack time constant is 10 times of the delay time constant). generally, the design value of 1:10 is adequate for the vast majority of applications. if adjustment is required, adding a resistor in parallel of the c agc capacitor may vary the ratio. the value of the resistor must be determined on a case by case basis. additional applications information in addition to the basic operation of the micrf007, the fol - lowing enhancements can be made. in particular, it is strongly recommended that the antenna impedance is matched to the input of the ic. antenna impedance matching as shown in figure 2 and table 3, the antenna pin input impedance is frequency dependent. the ant pin can be matched to 50 with a high pass circuit as shown in figure 3. that is, a shunt inductor from the antenna input to ground and a capacitor in series from the antenna input to the ant pin. j100 j25 ? 50 0 Cj25 Cj100 figure 2. impedance looking into antenna pin y c n e u q e r f ) z h m ( z n i ) ( 1 1 z 1 1 s 0 0 3 6 6 1 j C 2 1 9 2 5 . 0 j C 3 0 8 . 0 5 0 3 5 6 1 j C 2 1 0 3 5 . 0 j C 0 0 8 . 0 0 1 3 3 6 1 j C 2 1 6 3 5 . 0 j C 6 9 7 . 0 5 1 3 2 6 1 j C 3 1 6 3 5 . 0 j C 1 9 7 . 0 0 2 3 0 6 1 j C 2 1 3 4 5 . 0 j C 9 8 7 . 0 5 2 3 7 5 1 j C 2 1 0 5 5 . 0 j C 2 8 7 . 0 0 3 3 5 5 1 j - 2 1 6 5 5 . 0 j C 8 7 7 . 0 5 3 3 2 5 1 j C 2 1 4 6 5 . 0 j C 0 7 7 . 0 0 4 3 0 5 1 j - 1 1 2 7 5 . 0 j C 7 6 7 . 0 5 4 3 8 4 1 j C 1 1 8 7 5 . 0 j C 2 6 7 . 0 0 5 3 5 4 1 j C 1 1 6 8 5 . 0 j C 3 5 7 . 0 5 5 3 3 4 1 j C 1 1 2 9 5 . 0 j C 8 4 7 . 0 0 6 3 1 4 1 j C 1 1 7 9 5 . 0 j C 2 4 7 . 0 5 6 3 9 3 1 j C 1 1 3 0 6 . 0 j C 5 3 7 . 0 0 7 3 7 3 j1 C 10 1 6 . 0 j C 2 3 7 . 0 5 7 3 5 3 1 j C 0 1 9 1 6 . 0 j C 5 2 7 . 0 0 8 3 3 3 1 j C 0 1 5 2 6 . 0 j C 8 1 7 . 0 5 8 3 1 3 1 j C 0 1 1 3 6 . 0 j C 1 1 7 . 0 0 9 3 0 3 1 j C 0 1 4 3 6 . 0 j C 7 0 7 . 0 5 9 3 8 2 1 j C 0 1 1 4 6 . 0 j C 0 0 7 . 0 0 0 4 6 2 1 j C 0 1 7 4 6 . 0 j C 2 9 6 . 0 5 0 4 4 2 1 j C 0 1 3 5 6 . 0 j C 4 8 6 . 0 0 1 4 2 2 1 j C 0 1 0 6 6 . 0 j C 5 7 6 . 0 5 1 4 0 2 1 j C 0 1 7 6 6 . 0 j C 7 6 6 . 0 0 2 4 8 1 1 j C 0 1 3 7 6 . 0 j C 8 5 6 . 0 5 2 4 7 1 1 j C 0 1 7 7 6 . 0 j C 3 5 6 . 0 0 3 4 5 1 1 j C 0 1 4 8 6 . 0 j C 3 4 6 . 0 5 3 4 4 1 1 j C 0 1 7 8 6 . 0 j C 8 3 6 . 0 0 4 4 2 1 1 j C 8 4 0 7 . 0 j C 5 3 6 . 0 c series (pf) l shunt (nh) 1.5 62 1.4 62 1.6 56 1.5 56 1.4 56 1.7 51 1.5 51 1.4 51 1.6 47 1.5 47 1.4 47 1.6 43 1.5 43 1.4 43 1.3 43 1.6 39 1.4 39 1.3 39 1.2 39 1.5 36 1.4 36 1.2 36 1.5 33 1.4 33 1.3 33 1.6 30 1.5 30 1.4 30 1.2 30 table 4. input impedance vs. frequency l shunt c series ant pin figure 3. antenna impedance matching network
february 17, 2005 9 m9999-021705 micrf007 micrel inductor values may be different from table 4, depending on pcb material, pcb thickness, ground con?guration, and how long the traces are in the layout. values shown were charac-terized for a 0.031 inch thickness, fr4 board, solid ground plane on bottom layer, and very short traces. murata and coilcraft wire-wound 0603 or 0805 surface mount induc - tors were tested, however, any wire-wound inductor with high srf (self-resonance frequency) should do the job. shutdown function duty-cycled operation of the micrf007 (often referred to as polling) is achieved by turning the micrf007 on and off via the shut pin. the shutdown function is controlled by a logic state applied to the shut pin. when v shut is high, the device goes into low-power standby mode. this pin is pulled high internally, it must be externally pulled low to enable the receiver. it is recommended to connect this pin through a 100k ? resistor to ground power supply bypass capacitors power supply bypass capacitor(s) connected to v dd should have the shortest possible lead lengths to v ss . increasing selectivity with optional band-pass filter for applications located in high ambient noise environments, a ?xed value band-pass network may be connected between the ant pin and v ss to provide additional receiver selectivity and input overload protection. a minimum input con?gura - tion is included in figure 10. it provides some ?ltering and necessary overload protection. data squelching during quiet periods (no signal), the data output (do pin) transitions randomly with noise. most decoders can discrimi- nate between this random noise and actual data. but for some system, it does present a problem. there are three possible approaches to reduce this output noise: 1. analog squelch to raise the demodulator threshold 2. digital squelch to disable the output when data is not present 3. output ?lter to ?lter the (high frequency) noise glitches on the data output pin. the simplest solution is to add analog squelch by introduc - ing a small offset, or squelch voltage, on the c th pin so that noise does not trigger the internal comparator. usually 20mv to 30mv is suf?cient, and may be achieved by connecting a several-meg-ohm resistor from the c th pin to either v ss or v dd , depending on the desired offset polarity. since micrf007s receiver agc noise at the internal comparator input is always the same (set by the agc), the squelch offset requirement does not change as the local noise strength changes from installation to installation. introducing squelch will reduce sensitivity and also reduce range. only introduce an amount of offset suf?cient to quiet the output. typical squelch resistor values range from 10m to 6.8m for low to high squelch strength. i/o pin interface circuitry interface circuitry for the various i/o pins of the micrf007 are diagrammed in figures 4 through 9. the esd protection diodes at all input and output pins are not shown. ant pin active bias active load 50 3pf 6k figure 4. ant pin the ant pin is internally ac-coupled via a 3pf capacitor to an rf n-channel mosfet, as shown in figure 4. im-ped - ance on this pin to vss is quite high at low frequencies, and decreases as frequency increases. in the uhf fre-quency range, the device input can be modeled as 6.3k. in parallel with 2pf (pin capacitance) to v ss . c th pin vdd vss 675a 67.5a compa- rator 1.5a 15a timout cagc figure 5. c th pin figure 5 illustrates the c th -pin interface circuit. the c th pin is driven from a p-channel mosfet source-follower with approximately 10a of bias. transmission gates tg1 and tg2 isolate the 6.9pf capacitor. internal control signals phi1/phi2 are related in a manner such that the impedance across the transmission gates looks like a resistance of approximately 110k. the dc potential at the c th pin is approximately 1.6v c agc pin figure 6 illustrates the c agc pin interface circuit. the agc control voltage is developed as an integrated current into a capacitor c agc . the attack current is nominally 1.5a, while the decay current is a 10 times scaling of this, approximately 15a. signal gain of the rf/if strip inside the ic diminishes as the voltage on c agc decreases. by simply adding a capacitor to c agc pin, the attack/decay time constant ratio is ?xed at 10:1. modi?cation of the attack/decay ratio is pos - sible by adding resistance from the c agc pin to either vdd or vss, as desired. both the push and pull current sources are disabled during shutdown, which maintains the voltage across c agc , and improves recovery time in duty-cycled applications. to further improve duty-cycle recovery, both push and pull currents are increased by 45 times for approximately 10ms after release of the shut pin. this allows rapid recovery of any voltage drop on c agc while in shutdown.
micrf007 micrel m9999-021705 10 february 17, 2005 vdd vss 675a 67.5a compa- rator 1.5a 15a timout cagc figure 6. c agc pin do pin the output stage for the digital output (do) in figure 7. the output is a 20a push and 18a pull switched-current stage. this output stage is capable of driving cmos loads. an external buffer-driver is recommended for driving high capacitance loads. vdd vss compa- rator 20a 18a do figure 7. do pin refosc pin 250 ? 200k activ e bias refosc 30pf 30pf 30a vddbb vssbb vssbb figure 8. refosc pin the reference oscillator (refosc) input circuit is shown in figure 8. input impedance is high (290k). this is a colpitts oscillator with internal 30pf capacitors. this input is intended to work with standard crystal connected from this pin to the vss pin. the nominal dc bias voltage on this pin is 1.4v. shut pin to internal circuits vddbb vssbb shut q2 q3 q1 vssbb figure 9. shut pin control input circuitry is shown in figure 9. the standard input is a logic inverter constructed with minimum geometry mosfets (q2, q3). p-channel mosfet q1 is a large chan - nel length device, which functions essentially as a weak pull-up to vdd. typical pull-up current is 5a.
february 17, 2005 11 m9999-021705 micrf007 micrel application example 315mhz receiver/decoder application figure 10 illustrates a typical application for the micrf007 uhf receiver ic. this receiver operates continuously (not duty cycled) in ?xed-mode, and features 6-bit address decod - ing and two output code bits. operation in this example is at 315mhz, and may be cus - tomized by selection of the appropriate frequency reference (y1), and adjustment of the antenna length. changes from the 1kbps data rate may require a change in the value of r1. a bill of materials accompanies the schematic. c4 1.8pf l1 56nh 1/4 monopole antenna (23.1cm) c2 39nf c6 100pf c5 100f c3 2.2f r3 100k y1 4.8970mhz 6-bit address baseband (digital) ground rf (analog) ground +5v supply input c1 4.7f a0 a1 a2 a3 a4 a5 a6 a7 vss vdd vt osc1 osc2 din d11 d10 d9 d8 vss ant vdd cth refosc cagc shut do u1 micrf007 u2 ht-12d code bit 0 code bit 1 r1 68k r2 1k figure 10. 315mhz, 1kbps on-off keyed receiver with decoder bill of materials item part number manufacturer description qty. c1 grm21bf51a475za01l murata (7) 4.7f y5v 1 c2 vj0603y393kxxa vishay (1) 39nf 1 c3 grm188r61a225xe348 murata (7) 2.2f x5r 1 c4 grm1885c1h1r8cz01b murata (7) 1.8pf cog ceramic capacitor 1 c5 grm188r71e104ka01b murata (7) 100nf capacitor 1 c6 grm1885c1h101ja01b murata (7) 100pf capacitor 1 d1 ssf-lx100lid lumex (2) red led 1 l1 0603cs-56nx-b coilcraft (6) 56mh wire wound, q=38 1 r1 crcw06036812f vishay (1) 68k; 1/4w; 5% 1 r2 crcw06031001f vishay (1) 1k; 1/4w; 5% 1 r3 crcw06031003f vishay (1) 100k 1 u1 MICRF007BM micrel (3) uhf reciever 1 u2 ht-12d holtek (4) logic decoder 1 y1 ab-4.8970mhz-20-d abracon (5) 4.8970mhz crystal 1 notes: 1. vishay, tel. (203) 268-6261 2. lumex, tel. (800) 278-5666 3. micrel inc., tel (408) 944-0800 4. holteck, tel (408) 894-9046 5. abracon, tel. (949) 448-7070 6. coilcraft, tel. (510) 814-8954 7. murata, tel (408) 397-1284
micrf007 micrel m9999-021705 12 february 17, 2005 pcb layout information the micrf007 evaluation board was designed and charac - terized using double sided 0.031 inch thick fr4 material with 1 ounce copper clad. if another type of printed circuit board material is substituted, impedance matching and character - ization data may not be as stated in this document. pcb silk screen pcb component side layout pcb solder side layout c6 (c th ) y1 6.7458mhz u1 MICRF007BM j2 (np) sma 1 2 3 4 8 7 6 5 +5v r1 (np) c5 0.1f 16v r2 (np) c3 2.0pf 50v l2 27nh l1 (np) ant1 50? ant do c7 (np) r3 100k? sh c4 c agc c1 (np) c agc +5v c2 (np) 1 2 refosc gnd j1 (np) con2 1 2 j3 con5 3 4 5 +5v +5v gnd do sh +5v l3 (np) zcb-0603 do sh note: c th and c agc should be optimized according to data rate and data format. (np) = component not placed. vss ant vdd cth refosc cagc shut do figure 11. 433.92mhz schematic qr007-50-433
february 17, 2005 13 m9999-021705 micrf007 micrel package information 45 0C8 0.244 (6.20) 0.228 (5.79) 0.197 (5.0) 0.189 (4.8) seating plane 0.026 (0.65) max ) 0.010 (0.25) 0.007 (0.18) 0.064 (1.63) 0.045 (1.14) 0.0098 (0.249 ) 0.0040 (0.102) 0.020 (0.51) 0.013 (0.33) 0.157 (3.99) 0.150 (3.81) 0.050 (1.27) typ pin 1 dimensions: inches (mm) 0.050 (1.27) 0.016 (0.40) 8-lead soic (m) micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this data sheet is believed to be accurate and reliable. however , no responsibility is assumed by micrel for its use. micrel reserves the right to change circuitry and speci?cations at any time without noti?cation to the customer. micrel products are noth reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a signi? cant injury to the user. a purchasers use or sale of micrel products for use in life support appliances, devices or systems is at purchaser s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2004 micrel, incorporated.

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